Memory Design Publications

Publications in Memory Design

Explore the most influential research papers and scholarly works that have shaped Memory Design. Use the concept filter below to focus on a specific sub-area of research.

Memory Design

1.4K

Publications

74.9K

Citations

Showing yearly statistics from 2000-2026.

Page 1

	Year	Citations
Sorting networks and their applications Kenneth E. Batcher I/o DevicesMemory DesignEngineeringComputer ArchitectureNetwork Analysis	1968	2.4K
A study of replacement algorithms for a virtual-storage computer L. A. Belady IBM Systems Journal Cluster ComputingStorage PerformanceEngineeringMemory DesignComputer Architecture	1966	1.6K
Storage of 7 ± 2 Short-Term Memories in Oscillatory Subcycles John E. Lisman, Marco Idiart Science NeuropsychologyEngineeringMemory DesignOscillatory SubcyclesShort-term Memory	1995	1.5K
Memory access scheduling Scott Rixner, William J. Dally, Ujval J. Kapasi, Memory Access SchedulingEngineeringMemory DesignComputer ArchitectureMemory Access	2000	960
The working set model for program behavior Peter J. Denning Communications of the ACM EngineeringMemory DesignDynamic Resource AllocationComputer ArchitectureMemory Model (Programming)	1983	853
Efficient Memory Management for Large Language Model Serving with PagedAttention Woosuk Kwon, Z. Li, Siyuan Zhuang, Llm Fine-tuningEngineeringMemory DesignHigh ThroughputComputer Architecture	2023	776
Ramulator: A Fast and Extensible DRAM Simulator Yoongu Kim, Weikun Yang, Onur Mutlu IEEE Computer Architecture Letters EngineeringMemory DesignEmerging Memory TechnologyExtensible Dram SimulatorComputer Architecture	2015	714
Data Storage in the Cerebellar Model Articulation Controller (CMAC) James S. Albus Journal of Dynamic Systems Measurement and Control EngineeringMemory DesignComputer ArchitectureCm Ac MemoryMotor Control	1975	712
A Computer Network Model of Human Transactive Memory Daniel M. Wegner Social Cognition EngineeringMemory DesignComputer ArchitectureCognitionDesign Factors	1995	665
Selective adjustment of the speed of internal clock and memory processes. Warren H. Meck Journal of Experimental Psychology Animal Behavior Processes EngineeringMemory DesignComputer ArchitectureClock SynchronizationSocial Sciences	1983	630
Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM Hsuan‐Yu Lee, P. S. Chen, Tong Wu, Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyReactive Buffer Layer	2008	619
Ultrahigh density vertical magnetoresistive random access memory (invited) Jian‐Gang Zhu, Youfeng Zheng, G. A. Prinz Journal of Applied Physics Hardware SecuritySpintronicsMagnetismElectrical EngineeringEngineering	2000	588

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